AdvDCSM Professional Key Capabilities and Features

T1 PROFESSIONAL (Version 2) Outline

T1 has Five Operational Modes

T1 Capabilities for Operational Modes 1 & 3

T1 Capabilities for Operational Modes 2 & 4

T1 Capabilities for Operational Mode 5

T1's Features/Components/Models

T1 Supporting Features

AdvDCSM Professional (Version 2) OUTLINE

The AdvDCSMT1DCSS (T1) system tool/software program provides key Digital Communication (Comm) System and Subsystem models and algorithms that can be used to study, evaluate, or possibly design certain Convolutional Channel Codes and Viterbi Algorithm-based, 'Symbol-by-Symbol' MAP Algorithm-based, or Turbo (Iterative) Algorithm-based Channel Decoders.

Also, models and algorithms for certain Linear Block Channel Codes and Likelihood (& Syndrome) Channel Decoders are included in T1 for study, evaluation, and design of Block Codes and associated Channel Decoders.

Further, certain types of Low-Density Parity-Check (LDPC) Codes and associated Sum-Product or Bit Flipping Channel Decoders can be designed, studied, or evaluated by the use of T1.

This tool can be used by a Coding or Information Theorist to focus on developing implementable or practical Coder-Decoder devices that might improve the Reliability of a Digital Communication System.


Note: T1 is a Digital Communication SYSTEM SIMULATOR whose implementation is at the level of a PRODUCT PROTOTYPE. Its intended goal/purpose/design is to simulate reliably a variety of Digital Communication systems of varying complexity as described below. Its Capability(Operational Performance) is dependent on many complex interacting factors that involve the User's PC/Computer System components itself. The User must be cognizant of the limits of the User's Computer System.

Computational complexity (Simulation Time) for a Convolutional Channel Code System and its Simulated/Estimated Bit Error Rate (BER) Value and Confidence in this BER value is dependent on a number of complex interacting parameters. These parameters include the Total Number of Transmitted Information Source Bits, Signaling Channel characteristics (Vector or Discrete-Time) and Viterbi or MAP Algorithm Channel Decoder Trellis Size (Number of Trellis States and Branches).

For a Block Channel Code System, the Simulation Time is dependent on the Block Code Channel Decoder (Number of Block Code Words or Decoding List Size) along with the above described Source and Channel characteristics.

For a Turbo Channel Code System, the Simulation Time is dependent on the Turbo Encoder Interleaver Type and Size; and the Turbo (Iterative) Algorithm Channel Decoder's component decoders' Trellis Size and the Number of Iterations performed by the Turbo Decoder along with the above described Source and Channel characteristics.

For a Low-Density Parity-Check (LDPC) Channel Code System, the Simulation Time is dependent on the Number of Code Bits, Complexity of the Code's Tanner Graph, and the Number of Iterations performed by the Sum-Product or Bit Flipping Algorithm Channel Decoder along with the above described Source and Channel characteristics.

Thus, the Simulation Time is User and PC System dependent and can be quite long (possibly days). It is very important to realize that the Upper Bound or Maximum (MAX) Value of a Simulated System Parameters is set to allow for Users to experiment with their Simulated System Choices (build and simulate)for their PC System.

T1 has five Operational Modes:

1) Channel Coded Signaling over a Memoryless or Memory Single Channel or a Parallel MultiChannel;

2) Convolutional Code Finite-State Machine Definition (Code Vectors Generation);

3) UnCoded Signaling over a Memoryless or Memory Single Channel or a Parallel MultiChannel;

4) Markov Source-Convolutional Code Trellis States Generation; and

5) Past Results Review.

T1 Capabilities for Operational Modes 1 and 3 (System Model & Simulate)

T1 is capable of operating in the Channel Coded Signaling Mode (1) that can exist in one of seven possibe cases. These seven cases are as follows:

1) Binary Information Source, Convolutional Coding & Memoryless Channel;

2) Binary Information Source, Convolutional Coding & Memory Channel;

3) Binary Information Source, Convolutional Coding & Parallel MultiChannel;

4) Binary Information Source, Block Coding & Memoryless Channel;

5) Binary Information Source, Block Coding & Memory Channel;

6) Binary Information Source, Block Coding & Parallel MultiChannel;

7) Binary Information Source, Turbo Coding & Memoryless Channel;

8) Binary Information Source, Turbo Coding & Memory Channel;

9) Binary Information Source, Low-Density Parity-Check (LDPC) Coding & Memoryless Channel; and

10) Binary Information Source, Low-Density Parity-Check (LDPC) Coding & Memory Channel.

Cases 1, 2 and 3 are further partitioned into two possible Configurations that are predicated/based upon the characteristics of the Convolutional Code (CC) the complexity of the Viterbi Algorithm Channel Decoder. They are as follows:

1) default: b <= 3 CC, Independent and Identically Distributed Source and b <= 2 CC, Markov Source; and

2) alternate: b = 1 CC for both types of Sources.

For the Block Coding Cases (4, 5 and 6), Turbo Coding Cases (7 and 8), or Low-Density Parity-Check Code Cases (9 and 10), T1 has only one configuration.

Also, T1 is capable of operating in the UnCoded Signaling Mode (3). This Mode can exist in one of three possible cases that are as follows:

1) Binary Information Source & Memoryless Channel;

2) Binary Information Source & Memory Channel; and

3) Binary Information Source & Parallel MultiChannel;

T1 Capabilities for Operational Modes 2 and 4 (SubSystem Model & Analyze)

T1 is capable of operating in the Convolutional Code Finite-State Machine (FSM) Definition Mode (2) that can exist in one of two possible cases. These cases are as follows:

1) Non-Orthogonal Non-Recursive CC & Additive White Gaussian Noise Memoryless Channel (Modulator: Signal Vector Space);

2) Orthogonal Non-Recursive CC; and

3) Recursive Systematic CC & Additive White Gaussian Gaussian Noise Memoryless Channel.

Case 1 and 2 can exist in the same configurations as in Operational Mode 1.

A CC FSM Plot can be created for 2, 4, 8, or 16 States (& 32 States for Non-Orthogonal, b = 1) cases, saved as a User named output file (.PLT-CCFSM), and accessed via the File 'Open' choice;

T1 is capable of operating in the Markov Source-Convolutional Code Trellis States Generation Mode (4) that can exist in one of two possible configurations. These configurations are as follows:

1) b = 2 CC for Binary Symmetric or 4-States Markov Source; and

2) b = 1 CC for Binary Symmetric or 4-States Markov Source;

T1 Capability for Operational Mode 5 (Past Results Review)

T1 is capable of retrieving and displaying a Past Results and Statistics Output File so that the User can access easily one of the User's MOST RECENT generated such files (555 Maximum).

Note: Older such files are accessible using the File Menu 'Open" item.

T1 provides the following Features/Components/Models:

i) Simulated System Manager:

Digital Communication System Model Visual Builder:

Information (Info) Source, Channel Code, and Binary Coding Channel Category Selection;

Digital Communication System Simulation Progress and Elapsed Time Displayer governed by the Simulated System Clock Display Interval (SS Clk D I) parameter:

User-specified with AutoScale if required to display the progress of the simulated transmission of a sequence of Information Source Bits (e.g., CC Signaling: for 1 Million Info Bits, set SS Clk D I to10 thousand; LDPC Coded Signaling: for 10 Million Info Bits, set SS Clk D I to 1 thousand);

User-Specified file name for a simulation's Results and Statistics output file (.txt):

File name can consist of up to & including fifty one (51) characters;

ii) Binary Information Sources:

Independent and Identically Distributed (i.i.d.): Equiprobable and Unequiprobable (User can specify the probability of a '1');

Markov: Binary Symmetric and 4-States (User can specify State Transition Probabilities);

User-Specified Number of Information Bits: 1,000,000,000 MAX (Initial), with AutoScale increase if required by Matching Channel Code and/or Signaling Channel Throughput Requirements.

iii) Channel Codes:

Non-Recursive Convolutional Codes (b <= 3, bK = 15 MAX Classes; b = 1, bK = 13 MAX Class) including Rate = 1/2 and 1/3 J.P. Odenwalder Codes;

Best/Optimal Convolutional Codes: Rate = 1/2 (K = 3,...,13), 1/3 (K = 3,...,13), 1/4 (K = 3,...8), 1/5 (K = 3,...,8), 1/6 (K = 3,...,8) and High Rate = 2/3 ({K} = 2,2;...;5,5), 3/4 ({K} = 2,2,2;...;4,4,4) as specified by their Column Vector (CVR) and Binary Tap Weights Representations;

Trellis-Coded Modulation (TCM) Trellis Codes (Parallel Branches) (b = 2 and b = 3) including Rate = 2/3 (K = [2,1]) and 2/4 (K = [2,1]) examples as specified by their CVR and Binary Tap Weights Representations;

Orthogonal Non-Recursive Convolutional Codes (b = 1, bK = 5 MAX) that can only be used for Parallel MultiChannel Signaling Systems;

Custom Convolutional Code Visual Constructor;

Punctured Convolutional Codes constructed from Rate = 1/2, 1/3, 1/4, 1/5, and 1/6 Parent Codes for Puncturing Period = 2,...,8; Deletion of a First Code Bit of a Branch Code Vector is possible;

Note: These Punctured Codes are used only for Memoryless Single Channel Signaling Systems;

Punctured Convolutional Codes Constructed from Rate = 1/2, 1/3, 1/4, 1/5, and 1/6 Parent Codes that can only be used for Memoryless Single Channel Signaling Systems;

Custom Punctured Convolutional Code Puncturing Matrix P Visual Builder;

Rate Matching (RM) Convolutional Codes: a Non-Recursive Code whose Code Rate is changed by Puncturing or Repetition of Code Bits for each convolutional encoder branch (& Viterbi Algorithm decoder trellis branch) to match the Bit to M-ary channel input symbol requirement that is User-specified and independent of the code;

Rate Matching (RM) Punctured Convolutional Codes: a Non-Recursive Code whose Code Rate is changed by Puncturing of Code Bits for a sequence of convolutional encoder branches of a Puncturing Period (& a sequence of Viterbi Algorithm decoder trellis branches of a Puncturing Period) to match the User-specified Bit to M-ary channel input symbol requirement;

Turbo Codes [Parallel Concatenated Convolutional Codes (PCCC)]:

Turbo Codes (TC) (Rate = 1/3, 1/5, and 1/7), based on b = 1 Recursive Systematic Convolutional (RSC) Codes [Rate = 1/2 (K = 2,...,7), 1/3 (K = 2,...,7), and 1/4 (K = 2,...,7)];

TC Examples: CCSDS Standard for Deep-Space Telemetry (TC Rate = 1/3, 1/4, or 1/6, RSC code K = 5) and Cellular Standard for Mobile Communications [UMTS/3GPP (TC Rate = 1/3, RSC code K = 4), CDMA2000/3GPP2 (TC rate = 1/5, RSC code K = 4), or 4G/3GPP LTE (TC Rate = 1/3, RSC code K = 4)];

Other TC Examples based on Rate = 1/2, 1/3, or 1/4 RSC code Examples and

User-specified TC based on Rate = 1/2, 1/3, and 1/4 RSC code specified via its generator sequences, feedback (G0) & feedforward (G1,..,Gn-1) where n is number of RSC code bits;

Custom TC RSC Code Generators (G0,G1,..,Gn-1) Visual Constructor;

Turbo Encoder: Direct Write (i.i.d. or Markov Source) or NonUniform Interleaving (Markov Source) Frame Buffer and Block, Pseudorandom, Quadratic Permutation Polynomial (QPP), and Identity Interleavers;

Punctured Turbo Codes constructed from Rate = 1/3, 1/5, and 1/7 Parent Turbo Codes for Puncturing Period = 2;

Note: These Punctured Codes are used only for Memoryless Single Channel Signaling Systems.

Custom Punctured Turbo Code Puncturing Matrix P Visual Builder;

Rate Matching (RM) Punctured Turbo Codes: a Turbo Code whose Code Rate is changed by Puncturing of Code Bits for a sequence of turbo encoder's component encoders' branches of a Puncturing Period (& a sequence of turbo decoder's component decoder's trellis branches of a Puncturing Period) to match the User-specified Bit to M-ary channel input symbol requirement;

Linear Block Codes (N,L):

Systematic Parity-Check Codes (N = 14 MAX) (Gallager's code structure) including (5,2); (6,3); (7,3), (7,4); (8,4), (8,5); (9,3), (9,4), (9,5); (10,4), (10,5); (11,4), (11,5) codes as specified by the Parity Array of their Generator Matrices in Column Vector Representation (CVR); and Orthogonal Non-Systematic Parity-Check Codes, L = 6 MAX for Single Channel or L = 5 MAX for Parallel MultiChannel;

Block Code Minimum Distance (dmin) Determination;

Custom Systematic Parity-Check Block Code Visual Constructor;

Low-Density Parity-Check (LDPC) Binary Codes:

Systematic Gallager Codes (GC) (N,L): Parity-Check Matrix H is Randomly Generated via the Design Menu 'Channel Code Construction Low-Density Parity-Check (LDPC) Code Parameters' choice;

Regular GC Examples: Example I (N = 20, j = 3, k = 4) & Example II (N = 72, j = 5, k = 6);

Irregular GC Examples: Example I (N = 20, j = 3, k = 4 Initial Parameters) & Example II (N = 72, j = 5, k = 6 Initial Parameters);

User-Specified Regular Systematic Gallager Codes: k = 4, N = 1008 MAX; k = 5, N = 1260 MAX; k = 6, N = 1512 MAX & Irregular Systematic Gallager Codes: k = 4, N = 1008 MAX; k = 5, N = 1260 MAX; k = 6, N = 1512 MAX (Initial Parameters);

Regular and Irregular Gallager Code (GC) Progress and Elapsed Time Displayer governed by the GC Generation Clock Display Interval (GCG Clk D I) parameter;

Gallager LDPC Code Encoding Type: Generator Matrix G or Parity-Check Matrix H;

Systematic Array Codes (N,L): Parity-Check Matrix H is Deterministic Generated via the Design Menu 'Channel Code Construction Low-Density Parity-Check (LDPC) Code Parameters' choice;

Examples: Example I (N = 20, j = 3, k = 4, p = 5, Permutation Matrix: Right Cyclic Shift) & Example II (N = 92, j = 3, k = 4, p = 23, Permutation Matrix: Right Cyclic Shift);

User-Specified Systematic Array Codes: j = 6, k = 67, p = 67, N = 4489 MAX;

Array LDPC Code Encoding Type: Generator Matrix G or Parity-Check Matrix H;

Regular and Irregular Systematic Repeat-Accumulate (RA) Codes (N,K): Parity-Check Matrix H is dependent on the Interleaver Permutation Mapping that can be User Specified or Randomly Generated (Interleaver Length dependent) via the Design Menu 'Channel Code Construction Low-Density Parity-Check (LDPC) Code Parameters' choice;

Regular RA Code Example: Example I: N = 12, K = 3, q = 3; a = 1, 9x12 Array & Example II: N = 10, K = 4, q = 3, a = 2, 6x10 Array;

Irregular RA Code Example: Example I: N = 12, K = 3, q Avg = 3; a Avg = 1, 9x12 Array & Example II: N = 10, K = 4, q Avg = 3, a Avg = 2, 6x10 Array;

User-Specified Regular Systematic Repeat-Accumulate Codes: K = 299, N = 300 MAX & Irregular Systematic Repeat-Accumulate Codes: K = 50, N = 51 MAX;

Regular and Irregular RA Low-Rate (> 0 and <= 1/2) or High-Rate (> 1/2 and < 1);

Irregular RA Code q Vector and a Vector Visual Builder/Mapper;

Interleaver Construction Method is either User Specified (Interleaver Length <= 35), Randomly Generated or Derived from Randomly Generated Parity-Check Matrix;

Consult HELP Menu: LDPC Binary Codes Guide for LDPC Binary Code construction information;

iv) Memoryless Single Channels:

Noiseless, Binary Symmetric Channel (BSC) and Baseband Additive White Gaussian Noise (AWGN) Vector;

Channel Attenuation Model;

Channel Synchronization, Phase Coherency Model:

Coherent and Non-Coherent Signaling and Demodulation;

Actual Coherent Signaling and Demodulation (Phase-Lock Loop Based);

Baseband AWGN 1-D, 2-D or Multi-Dimensional Discrete-Time (DT) Waveform Channels using DT Matched Filter-Based Demodulators;

Linear Filter DT Waveform Channels: 1st-Order or 2nd-Order Polynomial-Based examples, User-Specified 1st-Order, 2nd-Order and 3nd-Order Polynomial-Based Models and Impulse (Unit-Sample Sequence);

Custom Linear Filter Channel Visual Builder/Mapper;

Punctured Convolutional Coded (PCC) Memoryless Single Channels:

Noiseless; BSC; and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

PCC Channel (Multiple Modulation Schemes & Signal-to-Noise Ratios) Visual Builders/Mappers;

Rate Matching Convolutional Coded Memoryless Single Channels:

Noiseless; BSC; and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

Rate Matching Convolutional Code Bit Visual Builder/Mapper;

Rate Matching Punctured Convolutional Coded Memoryless Single Channels:

Noiseless; BSC; and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

Rate Matching Punctured Convolutional Code Bit Visual Builder/Mapper;

Turbo Coded Memoryless Single Channels:

BSC and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

Punctured Turbo Coded (PTC) Memoryless Single Channels:

BSC and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

Rate Matching Punctured Turbo Coded (RM PTC) Memoryless Single Channels:

BSC and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

Rate Matching Punctured Turbo Code Bit Visual Builder/Mapper:

Consult HELP Menu: RM PTC Puncturing Matrices Guide for possible Puncturing Matrices;

Low-Density Parity-Check (LDPC) Coded Memoryless Single Channels:

BSC and Baseband AWGN Vector and DT Waveform Channels of the same characteristics as described above for general Memoryless Single Channels (section iv);

v) Additive White Gaussian Noise (AWGN) Signal Vector Spaces:

Linear Modulations Schemes:

Binary PSK, M-PSK (Phase Shift Keying), M = 4 (QPSK), 8, 16, 32, 64;

2-PAM, M-PAM (Pulse Amplitude Modulation), M = 4, 8, 16, 32, 64;

Square 4-QAM, 16-QAM, 64-QAM (Quadrature Amplitude Modulation);

Note: Parallel MultiChannel M-QAM Signaling uses only the Square constellation.

Baseband Received or Transmitted Signal-to-Noise Ratio (SNR, dB);

Gray Code Bit-to-M-ary Channel Symbol Converter and User-Specified Bit-to-M-ary Channel Symbol Converter;

Custom Bit-to-M-ary Channel Symbol Converter Visual Builder/Mapper;

Non-Square (NS) 8-QAM, 16-QAM, 32-QAM, 64-QAM:

Baseband Received or Transmitted Signal-to-Noise Ratio (SNR, dB);

Custom M-ary QAM Constellation (Non-Square or NS->Square) Visual Builder/Mapper;

Gray Code Bit-to-M-ary QAM Channel Symbol Converter and User-Specified Bit-to-M-ary QAM Channel Symbol Converter;

Custom Bit-to-M-ary QAM Channel Symbol Converter (Non-Square or NS->Square, 'Impure' Gray Code) Visual Builder/Mapper;

12-QAM, 24-QAM, 48-QAM [M Not a Power of Two (MNP2) NS QAM]:

Block Coded, LDPC Coded or UnCoded Signaling over a Memoryless Single Channel and

LDPC Coded Signaling over a Gilbert-Elliot Burst Memory Single Channel only;

Baseband Received or Transmitted Signal-to-Noise Ratio (SNR, dB);

Gray Code Bit-to-M-ary QAM MNP2 Channel Symbol Converter and User-Specified Bit-to-M-ary QAM MNP2 Channel Symbol Converter;

Custom Bit-to-M-ary QAM Channel Symbol Converter (MNP2 Non-Square, 'Impure' Gray Code) Visual Builder/Mapper;

Non-Linear Modulation Schemes:

Binary FSK, M-FSK (Frequency Shift Keying), M = 4, 8, 16, 32, 64;

Baseband Received or Transmitted Signal-to-Noise Ratio (SNR, dB);

Note: Binary Modulation (Binary PSK, 2-PAM, or Binary FSK) or M > 2 Modulation Schemes [M-PSK, M-PAM, M-QAM (M a Power of Two), or M-FSK for M = 4, 8, 16, 32, or 64] are used for Turbo Coded or Punctured Turbo Coded Signaling over AWGN Single Memoryless Channels;

vi) Memory Channels:

Classic Bursty Channel and Block Interleaver-DeInterleaver;

Vector and DT Waveform Channels:

Gilbert-Elliot Burst Channel with AWGN and Symbol Interleaver-DeInterleaver;

Rayleigh, Rician and Frequency-Selective Fading with AWGN and Diversity-Combiner and Symbol Interleaver-DeInterleaver;

Frequency-Selective Fading Channel Parameter Visual Builder/Mapper;

Real-valued (PAM) and Complex-valued (QAM) AWGN Channel with InterSymbol Interference (ISI) with AWGN: modeled as an Equivalent DT White Noise Transversal Filter (J.G. Proakis);

ISI Channel Models include PAM ISI Transversal Filter examples and User-Specified PAM or QAM DT Transversal Filter models (ISI Length: 1,...,10);

Custom PAM and QAM ISI Channel Visual Builder/Mapper;

Real-valued (PAM) and Complex-valued (QAM) Linear Equalization Filters:

Tap Weights (Coefficients) Optimization is based on Mean-Square-Error Criterion using Analytic, Recursive, and Recursive-Adaptive (Training) Algorithms; and

Linear Equalizer Coefficients' Decision-Directed Tracking Mode Update;

Turbo Coded and Punctured Turbo Coded (PTC) Memory Single Channels:

Classic Bursty Channel (CBC) with background error; Gilbert-Elliot Burst Channel; Fading Channel (Rayleigh, Rician, & Frequency-Selective); and ISI Channels (with Linear Equalization Filters) of the same characteristics as described above for general Memory Single Channels (section vi);

Rate Matching Punctured Turbo Coded (RM PTC) Memory Single Channels:

Classic Bursty Channel (CBC) with Background Error; Gilbert-Elliot Burst Channel; Fading Channel (Rayleigh, Rician, & Frequency-Selective); and ISI Channels (with Linear Equalization Filters) of the same characteristics as described above for general Memory Single Channels (section vi);

Rate Matching Punctured Turbo Code Bit Visual Builder/Mapper:

Consult HELP Menu: RM PTC Puncturing Matrices Guide for possible Puncturing Matrices;

Low-Density Parity-Check (LDPC) Coded Memory Single Channels:

Classic Bursty Channel (CBC) with Background Error; Gilbert-Elliot Burst Channel; Fading Channel (Rayleigh, Rician, & Frequency-Selective); and ISI Channels (with Linear Equalization Filters) of the same characteristics as described above for general Memory Single Channels (section vi);

vii) Parallel MultiChannels:

Additive White Gaussian Noise (AWGN) and Crosstalk (Xtalk) Parallel MultiChannels with AWGN;

Discrete MultiTone Modulation (DMT) MultiCarrier/MultiChannel (Orthogonal frequency-division multiplexing FFT-Based) with AWGN;

Parallel K-MultiChannel (SubChannel) Types:

Distinct or Identical (Small K); or Identical (Large K);

K-MultiChannel-Channel Input Symbol Bits Partition Visual Builder/Mappers (Coded Signaling);

K-MultiChannel Signal Vector-to-SubChannel Visual Builder/Mappers (Coded Signaling);

K-MultiChannel Signal Vector Type Mix Visual Builder/Mappers (UnCoded Signaling);

Bit and Power Allocation MultiChannel Parameters: Effective/Average Channel Input Bits per Subchannel Use and "Water Filling" Parameter-to-Noise Ratio VNR, Ev/No;

The MultiChannel can have a flat or Non-flat Frequency Response. The MultiChannel Linear Filter models are the same as in the Single Channel case.

For AWGN MultiChannels, the subchannels can exist as a Set of Linear Filters with Identical Impulse Responses or as a Set of Linear Filters constructed from a Single Linear Filter;

For XTalk MultiChannels, the subchannels can exist as a Set of Linear Filters with Identical Impulse Responses;

For DMT MultiChannels, the MultiChannel can exists as a Single Linear Filter;

Custom Signal Vector-to-SubChannel Impulse Response Visual Builder/Mapper;

Crosstalk Coefficients Visual Builder/Mapper for Distinct or Identical SubChannels;

Convolutional Coded DMT Systems: combination of Convolutional Codes, DMT MultiCarrier/MultiChannel Signaling and Viterbi Algorithm Decoder;

Block Coded DMT Systems: combination of Block Codes, DMT MultiCarrier/MultiChannel Signaling and Block Decoder;

viii) Convolutional Code (CC) and Punctured CC (PCC) Trellis Channel Decoders:

ML (Maximum Likelihood) Viterbi Algorithm (VA) Channel Decoders and

MAP (Maximum A Posteriori Probability) Viterbi Algorithm (VA) Channel Decoders;

CC VA Channel Decoder Types: Single Stage Hard-Output and Two-Stage Soft-Output (SOVA);

Note: SOVA CC Decoding is used only for BSC & AWGN Memoryless Single Channel Signaling Systems. This two-stage SOVA decoder is an example of a Compound Channel and a Soft-Input Viterbi Algorithm Decoder (2nd Stage).

PCC VA Channel Decoder Type: Single Stage Hard-Output;

RM PCC VA Channel Decoder Metric Demodulation Methods:

Not based on Trellis States (i.i.d. & Markov Sources) and Based on Trellis States (i.i.d. Sources).

SOVA Decoding: Block, Pseudorandom, Quadratic Permutation Polynomial (QPP), and Identity Interleavers-DeInterleavers;

'Symbol-by-Symbol' MAP (Maximum a Posteriori Probability) Algorithm [derived from the BCJR (Bahl, Cocke, Jelinek, and Raviv) MAP decoding algorithm] CC Channel Decoders (Data Bit b = 1 CC):

Max-Log-MAP, Log-MAP, and MAP Single Stage, Soft-Output Types that use Log-Domain Metrics;

MAP Algorithm (MAPA) Decoding: Block, Pseudorandom, Quadratic Permutation Polynomial (QPP), and Identity Interleavers-DeInterleavers;

SOVA & MAPA QPP Interleavers-DeInterleavers [f(x) = f1x + f2x^2 (mod Li)] 32 Examples and User-Specified (Custom) where Li is the Interleaver-DeInterleaver Length (Size);

ix) Turbo Code (TC), Punctured TC (PTC), Rate Matching (RM) PTC Trellis Channel Decoders:

Serial (Non-Iterative) and Serial with Feedback Loop (Iterative) of Two-Stage Concatenation (component decoders DEC1 & DEC2) Decoders;

MAP Algorithm (Max-Log-MAP, Log-MAP, and MAP) TC, PTC, and RM PTC Decoding;

Iterative Decoding: Input of Systematic Channel Output to Feedback Decoder (Serial Concatenated Decoders) can be to First Decoder (DEC1) Only or to Both Decoder (DEC1 & DEC2); Decoded Information (Data) Bits can be determined from second Decoder (DEC2) a posteriori log-likelihood ratios (L-values) only or from the Sum of both Decoders' (DEC1 and DEC2) L-values; and

Iteration Stopping Rule for each Data Block: Fixed Number and Cross-Entropy (CE) Criterion T(i) where T(i) < 0.001 times T(1) for the ith iteration;

User Specified Maximum Number of Iterations for both Stopping Rules: Twenty-two (22) MAX;

MAP Algorithm Decoding: Block, Pseudorandom, Quadratic Permutation Polynomial (QPP), and Identity Interleavers-DeInterleavers (will match type used in the Turbo Encoder);

Average Number of Iterations Calculation for CE Criterion Iteration Stopping Rule Use;

DEC2 Output Log-Likelihood Ratio Maximum and Minimum Block Sample Variance and corresponding Block Sample Mean Calculations (a Block size corresponds to the Turbo Encoder Interleaver size);

x) ML (Maximum Likelihood) Block Code Likelihood Channel Decoders:

MAP (Maximum A Posteriori Probability) Block Code Likelihood Channel Decoders;

ML (Maximum Likelihood) Syndrome Channel Decoders.

xi) Low-Density Parity-Check (LDPC) Code Iterative Message-Passing Channel Decoders:

Sum-Product Algorithm (Soft Decision) and Bit Flipping Algorithm (Hard Decision);

Sum-Product Algorithm (SPA) Decoder:

Model 1 (Bit Messages then Check Messages Iteration Processing) or Model 2 (Check Messages then Bit Messages Iteration Processing);

Bit Estimation Likelihood Decision Rule: MAP (Maximum A Posteriori Probability) or ML (Maximum Likelihood) for an Unequiprobable i.i.d. Binary Source (Memoryless Channel or Fading Channel); ML for Equiprobable i.i.d., All-Zero i.i.d., or Markov Binary Source [Memoryless Channel or Burst, Fading, or InterSymbol Interference (ISI) Memory Channel];

Implementation Type [for Check Message (Check Node to Bit Node Message) Calculation]: Theoretical SPA, Replace SPA Product Term by Sum, or Replace SPA Product Term by Min-Sum;

User Specified Maximum Number of SPA Decoding Iterations per Block (Imax): 3000 MAX;

Bit Flipping Algorithm (BFA) Decoder:

Bit Estimation Decision Rule: MAP (Maximum A Posteriori Probability) or ML (Maximum Likelihood) for an Unequiprobable i.i.d. Binary Source (Memoryless Channel or Fading Channel); ML for Equiprobable i.i.d., All-Zero i.i.d., or Markov Binary Source [Memoryless Channel or Burst, Fading, or InterSymbol Interference (ISI) Memory Channel];

User Specified Maximum Number of BFA Decoding Iterations per Block (Imax): 3000 MAX;

SPA and BFA LDPC Code Decoder Figure-of-Merit:

Maximum Number of Iterations per Block (All Blocks) or Number of 'Detected Errors'; and

Average (Sample Mean) and Sample Variance of Number of Iterations per Block;

xii) M-ary Signaling Demodulation Constellation Demappers (M > 2 Search Algorithms):

Search by Signal Vector Partitions (Hard Decision) for Coded and UnCoded Single AWGN Memoryless Channels, Single AWGN Memory Channels, and AWGN Parallel MultiChannels;

Search by Bit Position and Value Partition (Soft Decision) for RM PCC Single AWGN Memoryless Channels (Non-Trellis States Demodulation for VA Decoding Metric Calculation using Bit Metrics) and UnCoded Single AWGN Memoryless Channels;

Search by Bit Position and Value Partition (Soft Decision) for Turbo Coded (TC) or Punctured Turbo Coded (PTC) Single AWGN Memoryless Channels [Demodulation for TC or PTC Decoding Metric Calculation using Max-Log or Log-Sum Bit Metrics (User-specified)];

Search by Bit Position and Value Partition (Soft Decision) for Turbo Coded (TC), Punctured Turbo Coded (PTC), or Rate Matching (RM) PTC Single AWGN Memoryless Channels [Demodulation for TC, PTC, or RM PTC Decoding Metric Calculation using Max-Log or Log-Sum Bit Metrics (User-specified)];

Search by Bit Position and Value Partition (Soft Decision) for Turbo Coded (TC), Punctured Turbo Coded (PTC), or Rate Matching (RM) PTC Single AWGN Memory Channels [Demodulation for TC, PTC, or RM PTC Decoding Metric Calculation using Max-Log or Log-Sum Bit Metrics (User-specified)];

Search by Bit Position and Value Partition (Soft Decision) for Low-Density Parity-Check (LDPC) Coded Single AWGN Memoryless Channels [Demodulation for LDPC Decoding Metric Calculation using Max-Log or Log-Sum Bit Metrics (User-specified)] and Constellation Demapper Decision Rule for LDPC Decoding: MAP or ML for an Unequiprobable i.i.d. Binary Source; ML for Equiprobable i.i.d., All-Zero i.i.d., or Markov Binary Source; and

Search by Bit Position and Value Partition (Soft Decision) for Low-Density Parity-Check (LDPC) Coded Single AWGN Memory Channels [Demodulation for LDPC Decoding Metric Calculation using Max-Log or Log-Sum Bit Metrics (User-specified)] and Constellation Demapper Decision Rule for LDPC Decoding: MAP or ML for an Unequiprobable i.i.d. Binary Source (Fading); ML for Equiprobable i.i.d., All-Zero i.i.d., or Markov Binary Source (Burst, Fading, or ISI);

xiii) Destination:

Decoded Information Bit Stream Receiver for Coded Signaling or Demodulated Information Bit Stream Receiver for UnCoded Signaling;

Bit Error Rate (BER)/Bit Error Probability (Pb) Estimate for Coded or UnCoding Signaling;

Frame Error Rate (FER) Estimate for Low-Density Parity-Check Coded Signaling.

II) AdvDCSMT1DCSS SUPPORTING FEATURES:

1) Channel Code Capabilities/Configuration:

This feature allows the User to choose one of two possible CC classes (b <= 3; b = 1) or allows the User to observe the Convolutional, Turbo, Block, or LDPC Codes configuration;

2) Channel Code Construction:

This feature allows the User to add a CC or Block Code to his/her Custom CC or Block Code List. This code will then become available for a Convolutional Code or Block Code Input selection, respectively;

In addition, this feature allows the User to create a Gallager (Regular or Irregular), Array, or Repeat-Accumulate (Regular or Irregular) Low-Density Parity-Check (LDPC) Code and store its corresponding parameters (Parity-Check Matrix H, etc.) in a User-named Data file ('.txt').

This Parity-Check Matrix H is an "one-origin" 2-D array whose indices of non-zero matrix elements are stored in a "zero-origin" 2-D array in this Data File. These indices are offset by one.

A User-named '.txt' file is created to contain the output validity data. This output file is accessible via the File 'Open' choice.

Also, this feature allows the User to add the LDPC code to the User's LDPC Code List. This list, a set of LDPC Code Parameters Data Files, is indexed via a LDPC Code Parameters MOST RECENT generated File Names (FN) List, 222 File Names Maximum, via a Query. Older LDPC Code Data files can be indexed via the same LDPC Code Parameter FN Query. This LDPC Code will then become available (via a Data File) for a LDPC Code Input selection for a LDPC Coded Signaling Simulation. Consult HELP Menu: LDPC Binary Codes Guide for build information;

3) Channel Encoder Validation [LDPC Code Parity-Check Matrix H Encoding (HENC)]:

This feature allows the User to validate a Gallager or Array LDPC Code's Parity-Check Matrix H before it is used in the LDPC Coded Signaling Simulation. A Gallager or Array code is selected via the User's Custom LDPC Code List whereby its Matrix A is converted into a Parity-Check Matrix H that can be used in a Parity-Check Matrix H Encoder. This Matrix H parameter (along with other parameters) is stored in a User-named Data File ('.txt').

This Parity-Check Matrix H is an "one-origin" 2-D array whose indices of non-zero matrix elements are stored in a "zero-origin" 2-D array in this Data File. These indices are not offset.

Also, a User-named '.txt' file is created to contain the output validity data. This output file is accessible via the File 'Open' choice.

Also, this feature allows the User to add the LDPC code to the User's LDPC Code HENC List. This list, a set of LDPC Code HENC Parameters Data Files, is indexed via a LDPC Code HENC Parameters MOST RECENT generated File Names (FN) List, 222 File Names Maximum, via a Query. Older LDPC Code HENC Data files can be indexed via the same LDPC Code HENC Parameter FN Query. This LDPC Code HENC will then become available (via a Data File) for a LDPC Code HENC Input selection for a LDPC Coded Signaling Simulation. Consult HELP Menu: LDPC Binary Codes Guide for build information;

4) Channel Decoder Validation:

Viterbi Algorithm or Iterative Turbo Channel Decoder (Max-Log-MAP or Log-MAP Algorithm):

This feature allows the User to verify the correct operation of the Viterbi Algorithm Channel Decoder for an Equiprobable i.i.d. Binary Information Source, a Rate = 1/2, K = 3 Odenwalder Convolutional Code (Tap Weights CVR of [3,2,3]) and a given Binary Symmetric Channel (BSC) Output Vector Y Sequence. The 'ResultsVAcdecodervalidation.txt' file is created to contain the output validity data. This output file is accessible via the File 'Open' choice. A User-named plot output file (.PLT-TRELLIS) is accessible via the File 'Open' choice;

Also, the User can verify the correction operation of the Iterative Turbo Channel Decoder for an Equiprobable i.i.d. Binary Information Source, a Rate = 1/2, K = 2 RSC Code [Generators G0 (feedback polynomial) = 1 + D; & G1 = 1] and a Binary Modulated AWGN Memoryless Channel Output Vector R Sequence. The 'ResultsmaxlmapITCcdecodervalidation.txt' file is created for the Max-Log-MAP case to contain the output validity data ('ResultslmapITCcdecodervalidation.txt' for the Log-MAP case). These output files are accessible via the File 'Open' choice.

5) Channel Decoder Metric Growth Normalization:

This feature allows the User to choose one of two possible Turbo Decoder Path Metric (PM) Growth Normalization methods or allows the User to observe the current PM Growth Normalization method for the Serial Turbo Decoder (Single Iteration) or Serial with Feedback Turbo Decoder (Iterative). The normalization of the Turbo Decoder (Forward Processor 1 & 2 and Backward Processor 1 & 2) Path Metrics is based upon subtraction of a term from all of the trellis state PMs at each trellis depth. This term is determined using the set of a depth's active state PMs and the Logarithm of Sum-of-Exponentials [exp(PM)] or the PM Maximum.

Note: If a 'TC Decoder Decode ...: Search Bound Error!!!!!' were to occur during a Turbo Code simulation, one could retry the simulation using the Maximum PM Growth Normalization method (if the Logarithm of Sum-of-Exponentials PM Growth Normalization method is being used);

6) Simulated System Randomness Processes Validation:

This feature allows the User to observe the Randomness of the Uniform Distributed Random Number Generation or the Gaussian Distributed Random Number Generation via a Serial Correlation Test as shown by a 2-Dimensional Plot. A User named plot output file (.PLT-RN) is accessible via the File 'Open' choice;

7) M-ary Modulation Scheme Validation/Design/Edit:

This feature allows the User to verify the Peak Baseband Channel Symbol SNR for an Information Bit Baseband SNR, Eb/N0 and its derived Average Channel Symbol Baseband SNR, Es/N0 for a selected M-QAM (Quadrature Amplitude Modulation) Scheme for a UnCoded Signaling System. The Gray Code Penalty and Peak Gray Penalty is also determined for this selected M-QAM scheme and its associated Bit-Symbol Mapping. A User-named '.txt' file is created to contain the output validity data. This output file is accessible via the File 'Open' choice. A User-named plot output file (.PLT-MQAMSV) is accessible via the File 'Open' choice.

Also, this feature allows the User to add a MQAM Scheme to the User's Custom MQAM Scheme List. This list, a set of MQAM Scheme Parameters Data Files, is indexed via a MQAM Scheme Parameters MOST RECENT generated File Names (FN) List, 100 File Names Maximum, via a Query. Older MQAM Scheme Data files can be indexed via the same MQAM Scheme Parameter FN Query. This MQAM Scheme will then become available (via a Data File) for a MQAM Scheme Input selection for a Coded or UnCoded MQAM Signaling Simulation or M-ary Modulation Scheme Edit for MQAM; and

8) Bit Error Rate (BER)/Bit Error Probability (Pb) Plot Generation:

This feature allows the User to generate a Bit Error Rate (BER) or Bit Error Probability (Pb) versus Information Bit Baseband SNR, EbN0 in dB Plot. A BER plot can consist of one (1) to six (6) curves where a curve can consist of three (3) to sixteen (16) data points. A User-name plot output file (.PLT-BER) is accessible via the File 'Open' choice.

Also, this feature allows the User to add a BER Plot Data to the User's Custom BER Plot Data List. This list, a set of BER Plot Data Files, is indexed via a BER Plot Data MOST RECENT generated File Names (FN) List, 222 File Names Maximum, via a Query. Older BER Plot Data files can be indexed via the same BER Plot FN Query. This BER Plot Data will then become available (via a Data File) for a BER Plot Input selection for BER Plot Edit for generating a revised BER Plot.

VIEW a BER PLOT GENERATION EXAMPLE and LEARN more about this feature.

      

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